SMU

 

Rui Wang

Former group member
Ph.D. 2014 (advised from 08/2010-06/2014)
First Employer - Broadcom
 

Rwang


Publications with the Integrated Circuits and Microsystems Research Group

1. Rui Wang, "Design of Continuous-Time Sigma-Delta ADCs: with power-optimized reconfigurability and with high bandwidth, high resolution," Ph.D. Dissertation, Southern Methodist University, 2014. 

2. Rui Wang, Deping Huang, Tianshi He, Yang You, Ping Gui, and Jinghong Chen, "Effect of OPAMP Input Offset on Continuous-Time Sigma Delta Modulators with Current-Mode DACs," IEEE Transactions on Circuits and Systems I, Regular Papers, vol. 42, no. 7, pp. 1699-1706, June 2015.

3. Rui Wang, Yang You, Guoying Wu, Xiaoke Wen, Jinghong Chen, Kamran Azadet, Ping Gui, "Design and Simulation of a DAC-Calibrated 150MHz Bandwidth Continuous-Time Sigma-Delta Modulator in 28nm CMOS," Journal of Analog Integrated Circuits and Signal Processing, Volume 87, Issue 3, pp. 327-340, June 2016.

4. Rui Wang, Xiaoke Wen, Kamran Azadet, Changzhi Li, and Jinghong Chen, "A Power-optimized Reconfigurable CT Sigma-Delta Modulator in 65nm CMOS," IEEE International Symposium on Circuits and Systems, Seoul, Korea, May 2012, pp. 305-308. 

5. Xiaoke Wen, Rui Wang, Renguo Peng, Xi Tan, and Jinghong Chen, "A 12b 60MS/s SHA-Less Opamp-Sharing Pipeline A/D with Switch-Embedded Dual Input OTAs," IEEE International Symposium on Circuits and Systems, Seoul, Korea, May 2012, pp. 802-805. 

6. Xiaoke Wen, Rui Wang, Siyu Yang, Lei Chen, and Jinghong Chen, "A 30mW 10-bit 250MS/s Dual-Channel SHA-less Pipeline ADC in 0.18um CMOS," IEEE Midwest Symposium on Circuits and Systems, Boise, Idaho, August 5-8, 2012, pp. 1004-1007. 

7. Yang You, Jinghong Chen, Deping Huang, Rui Wang, Datao Gong, Tiankuan Liu, and Jingbo Ye, "A 12GHz Low-Jitter LC-VCO PLL in 130nm CMOS," Journal of Instrumentation, vol.10, no. 3, JINST 10(03) C03013, March 2015.

8. Yang You, Jinghong Chen, Deping Huang, Rui Wang, Datao Gong, Tiankuan Liu, and Jingbo Ye, "SET Detection and Compensation and Its Application in PLL Design," Journal of Instrumentation, JINST 10(05):C05018, May 2015.

9. Yang You, Jinghong Chen, Deping Huang, Rui Wang, Datao Gong, Tiankuan Liu, and Jingbo Ye, "A 12GHz Low-Jitter LC-VCO PLL in 130nm CMOS," TWEPP'2014.

10. Yang You, Jinghong Chen, Deping Huang, Rui Wang, Datao Gong, Tiankuan Liu, and Jingbo Ye, "SET Detection and Compensation and Its Application in PLL Design," TWEPP'2014.

11. Rui Wang, You Yang, Guoying Wu, Xiaoke Wen, Jinghong Chen, Kamran Azadet, and Ping Gui, "A 150MHz Bandwidth Continuous-Time Sigma Delta Modulator in 28nm CMOS with DAC Calibration," 2015 IEEE Midwest Symposium on Circuits and Systems, MWSCAS'2015, Fort Collins, CO, August 2-5, 2015, pp. 1-4.