ELEE 7366

Syllabus for Spring 2005

1. Isolation technologies for ICs

Junction isolation

LOCOS based technologies

Semi recessed oxide processes

Fully recessed LOCOS

Non-Locos isolation (Trench Etch and Refill)

Silicon on Isolation SOI Technologies

Wafer bonding

SIMOX

Selective or lateral growth of epitaxial layers

Review of ITRS requirements for current isolation processes

Return to ECE 7366 General or Home

2. Contact technology and local interconnects for VLSI

The role of contact structures in device and circuit behavior

Theory of M-S contacts

Contact resistance and specific contact resistivity - test structures

Conventional M-S contacts

Limitations of aluminum

Silicides for self-aligned contacts

Diffusion barriers

Schottky barriers

Multilayered ohmic contact

Formation of shallow junctions and their impact on contact fabrication

Buried contacts

Local interconnects

 Return to ECE 7366 General or Home

3. Multilayer Interconnect technology for VLSI (3/1, 3/3, 3/8)

The need for multilevel interconnects

Materials for multilevel interconnects technologies

Conductors

Dielectrics

Planarization of interlevel dielectrics

Metal deposition and via filling

Yield and reliability issues: electromigration, corrosion, hillocks, voids

Passivation layers

Cu interconnects

Chemical mechanical polishing (CMP) issues for planarization of dielectrics and metals

Return to ECE 7366 General or Home

4. MOS Devices and NMOS processes (3/10, 3/22, 3/24)

MOS FET physics

Device design and technology

Evolution of MOS technology (PMOS, NMOS)

Process sequence for NMOS inverters

Short channel effects

Hot carrier effects

5. Midterm Exam (3/29 take home)

6. CMOS process integration (3/29, 3/31, 4/5)

Advantage of CMOS over NMOS circuits

Well technology for CMOS

PMOS devices

Latchup in CMOS

Isolation technology for CMOS ICs

CMOS process sequence

Return to ECE 7366 General or Home

7. Bipolar and BiCMOS process integration (4/7, 4/12, 4/14)

Bipolar transistors in digital ICs

Parameters' optimization by process technology

Advanced BJT designs for VLSI ICs (polysilicon E, self aligned structures, SiGe BJTs)

BICMOS technology - optimization via technology and design

8. Semiconductor memories (4/19, 4/21, 4/26)

RAM and ROM

SRAM

DRAM

EPROM

FLAH

8. Students' presentations (4/28)

9. Final Exam

Return to ECE 7366 General or Home